Concurrent bist cost estimation during data path allocation. (c2003)

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dc.contributor.author Kodeih, Maya
dc.date.accessioned 2011-10-07T09:16:08Z
dc.date.available 2011-10-07T09:16:08Z
dc.date.copyright 2003 en_US
dc.date.issued 2011-10-07
dc.date.submitted 2003-02-23
dc.identifier.uri http://hdl.handle.net/10725/704
dc.description Includes bibliographical references (leaves 53-55). en_US
dc.description.abstract The increase in density that the advent of Very Large Scale Integration (VLSI) has allowed made the move to higher levels of design abstraction imperative. High Level Synthesis emerged as a result; however, most solutions 1) were not optimal; 2) did not incorporate testing at the system level. Recently, a new trend in high-level synthesis has emerged, with researches being aware of the importance of testability at the system level. In this work we introduce a method for concurrent BIST cost estimation during testable data path allocation. A basic feature of this method is the integration of testability in the design process. The main objective is to develop a system-level synthesis tool set mapping a behavioral description onto an optimized and testable RTL design subject to user-defined constraints. The method considers test points cost concurrently with design cost. In order to measure the performance of our method, we use six data flow graphs which are widely adopted for benchmarking high-level BIST synthesis. en_US
dc.language.iso en en_US
dc.subject Electronic data processing en_US
dc.subject Digital integrated circuits -- Computer-aided design en_US
dc.subject Digital integrated circuits -- Design and construction -- Data processing en_US
dc.title Concurrent bist cost estimation during data path allocation. (c2003) en_US
dc.type Thesis en_US
dc.term.submitted Fall en_US
dc.author.degree MS in Computer Science en_US
dc.author.school Arts and Sciences en_US
dc.author.idnumber 199406110 en_US
dc.author.commembers Dr. Walid Kairouz
dc.author.commembers Dr. Nashaat Mansour
dc.author.woa OA en_US
dc.description.physdesc 1 bound copy: ix, 55 leaves; ill.; 30 cm. available at RNL. en_US
dc.author.division Computer Science en_US
dc.author.advisor Dr. Haidar M. Harmanani
dc.identifier.doi https://doi.org/10.26756/th.2003.9 en_US
dc.publisher.institution Lebanese American University en_US

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