Hardware implementation of intelligent systems

dc.contributor.editor	Teodorescu, Horia-Nicolai
dc.contributor.editor	Jain, Lakhmi C.
dc.contributor.editor	Kandel, Abraham
dc.date.accessioned	2017-12-01T11:18:29Z
dc.date.available	2017-12-01T11:18:29Z
dc.date.copyright	2001	en_US
dc.date.issued	2017-12-01
dc.identifier.isbn	978-3-7908-1816-1	en_US
dc.identifier.uri	http://hdl.handle.net/10725/6691
dc.language.iso	en	en_US
dc.publisher	Springer	en_US
dc.title	Hardware implementation of intelligent systems	en_US
dc.type	Book / Chapter of a Book	en_US
dc.author.school	SOE	en_US
dc.author.department	Electrical And Computer Engineering	en_US
dc.identifier.doi	https://doi.org/10.1007/978-3-7908-1816-1	en_US
dc.identifier.ctation	Vemuri, R., Govindarajan, S., Ouaiss, I., Kaul, M., Srinivasan, V., Radhakrishnan, S., ... & Lakshmikanthan, P. (2001). Automated design synthesis and partitioning for adaptive reconfigurable hardware. In Hardware implementation of intelligent systems (pp. 3-52). Physica-Verlag HD.	en_US
dc.chapter.author	Ouaiss, Iyad
dc.chapter.author	Vemuri, Ranga
dc.chapter.author	Govindarajan, Sriram
dc.chapter.author	Kaul, Meenakshi
dc.author.email	iyad.ouaiss@lau.edu.lb	en_US
dc.chapter.pages	3-52	en_US
dc.chapter.title	Automated design synthesis and partitioning for adaptive reconfigurable hardware	en_US
dc.identifier.tou	http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php	en_US
dc.identifier.url	https://link.springer.com/chapter/10.1007/978-3-7908-1816-1_1	en_US
dc.author.affiliation	Lebanese American University	en_US