An effective design system for dynamically reconfigurable architectures

Ouaiss, I.; Govindarajan, S.; Srinivasan, V.; Kaul, M.; Vemuri, R.

An effective design system for dynamically reconfigurable architectures

Ouaiss, I.; Govindarajan, S.; Srinivasan, V.; Kaul, M.; Vemuri, R.

URI: http://hdl.handle.net/10725/5814

URL: http://ieeexplore.ieee.org/abstract/document/707932/

DOI: http://dx.doi.org/10.1109/FPGA.1998.707932

Date: 2017-06-22

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Abstract:

Abstract: The SPARCS system is an integrated partitioning and synthesis environment for reconfigurable architectures. In this paper, we use the Joint Photographic Experts Group (JPEG) image compression algorithm as a design example to demonstrate the effectiveness of dynamic reconfiguration achieved using SPARCS. We present a typical design process using the SPARCS system consisting of temporal partitioning, spatial partitioning, and design synthesis. The results, obtained on a commercial RC architecture, show that the multiply-reconfigured version of the JPEG compression algorithm achieves reasonable improvement in execution times compared to the one-time configured version.

Citation:

Govindarajan, S., Ouaiss, I., Kaul, M., Srinivasan, V., & Vemuri, R. (1998, April). An effective design system for dynamically reconfigurable architectures. In FPGAs for Custom Computing Machines, 1998. Proceedings. IEEE Symposium on (pp. 312-313). IEEE.