Memory synthesis for FPGA-Based reconfigurable computers

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dc.contributor.author Ouaiss, Iyad
dc.contributor.author Kasat, Amit
dc.contributor.author Vemuri, Ranga
dc.date.accessioned 2017-06-21T10:54:44Z
dc.date.available 2017-06-21T10:54:44Z
dc.date.issued 2017-06-21
dc.identifier.uri http://hdl.handle.net/10725/5809
dc.description.abstract For data intensive applications like Digital Signal Processing, Image Processing, and Pattern Recognition, memory reads and writes constitute a large portion of the total design execution time. With the advent of on-chip memories, a rich hierarchy of physical memories is now available on a Reconfigurable Computer (RC). An intelligent usage of these memories can lead to a significant improvement in the latency of the overall design. This paper presents an automated heuristic-based memory mapping framework for RCs. We use a Tabu search guided heuristic, Rectangle Carving, to map a single data structure onto several instances of a memory type on the RC. We also introduce control logic to resolve potential memory access conflicts and to make the details of memory mapping transparent to the accessing logic. en_US
dc.language.iso en en_US
dc.publisher Springer en_US
dc.title Memory synthesis for FPGA-Based reconfigurable computers en_US
dc.type Conference Paper / Proceeding en_US
dc.author.school SOE en_US
dc.author.idnumber 200105659 en_US
dc.author.department Electrical And Computer Engineering en_US
dc.description.embargo N/A en_US
dc.identifier.doi http://dx.doi.org/10.1007/3-540-44687-7_8 en_US
dc.identifier.ctation Kasat, A., Ouaiss, I., & Vemuri, R. (2001, August). Memory synthesis for FPGA-based Reconfigurable computers. In International Conference on Field Programmable Logic and Applications (pp. 70-80). Springer Berlin Heidelberg. en_US
dc.author.email iyad.ouaiss@lau.edu.lb en_US
dc.conference.date 27-29 August 2001 en_US
dc.conference.pages 70-80 en_US
dc.conference.place Belfast, Northern Ireland, UK en_US
dc.conference.title International Conference on Field Programmable Logic and Applications en_US
dc.identifier.tou http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php en_US
dc.identifier.url https://link.springer.com/chapter/10.1007/3-540-44687-7_8 en_US
dc.author.affiliation Lebanese American University en_US
dc.relation.numberofseries 2147 en_US
dc.title.volume Field-Programmable Logic and Applications en_US

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