Test insertion at the RT level using functional test metrics

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dc.contributor.author Harmanani, H.
dc.contributor.author Harfoush, S.
dc.date.accessioned 2017-03-30T10:08:11Z
dc.date.available 2017-03-30T10:08:11Z
dc.date.issued 2017-03-30
dc.identifier.isbn 0-7803-6542-9 en_US
dc.identifier.uri http://hdl.handle.net/10725/5464
dc.description.abstract A new method of redesign for testability at the Register-Transfer Level (RTL) is proposed. The method identifies hard to test parts of a an RTL design synthesized either manually or automatically using high-level synthesis tools. The design is modified by inserting additional test registers followed by a test selection process. During the selection process, two test metrics are used in order to minimize test overhead. Finally, test scheduling is performed so that to minimize the overall test time and the number of test sessions. The system outputs a VHDL description of a testable data path along with a test plan. en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.title Test insertion at the RT level using functional test metrics en_US
dc.type Conference Paper / Proceeding en_US
dc.author.school SAS en_US
dc.author.idnumber 199490170 en_US
dc.author.department Computer Science and Mathematics en_US
dc.description.embargo N/A en_US
dc.keywords Circuit testing en_US
dc.keywords Automatic testing en_US
dc.keywords Built-in self-test en_US
dc.keywords System testing en_US
dc.keywords Design for testability en_US
dc.keywords Costs en_US
dc.keywords Logic testing en_US
dc.keywords Pattern analysis en_US
dc.keywords Registers en_US
dc.keywords Scheduling en_US
dc.identifier.doi http://dx.doi.org/10.1006/bbrc.1994.188310.1109/ICECS.2000.913048 en_US
dc.identifier.ctation Harmanani, H., & Harfoush, S. (2000). Test insertion at the RT level using functional test metrics. In Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on (Vol. 2, pp. 1016-1020). IEEE. en_US
dc.author.email haidar.harmanani@lau.edu.lb en_US
dc.conference.date 17-20 Dec. 2000 en_US
dc.conference.pages 1016-1020 en_US
dc.conference.title The 7th IEEE International Conference on Electronics, Circuits and Systems, 2000 en_US
dc.identifier.tou http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php en_US
dc.identifier.url http://ieeexplore.ieee.org/abstract/document/913048/ en_US
dc.author.affiliation Lebanese American University en_US

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