An optimal formulation for test scheduling network-on-chip using multiple clock rates

LAUR Repository

Show simple item record

dc.contributor.author Harmanani, Haidar M.
dc.contributor.author Salamy, Hassan
dc.date.accessioned 2017-03-28T13:19:51Z
dc.date.available 2017-03-28T13:19:51Z
dc.date.issued 2017-03-28
dc.identifier.isbn 978-1-4244-9789-8 en_US
dc.identifier.uri http://hdl.handle.net/10725/5448
dc.description.abstract With the growing trend of increasing number of cores on a single chip, bus-based communication is suffering from bandwidth and scalability issues. As a result, the new approach is to use a network on chip (NoC) as the main communication system on a SoC. NoC provides the flexibility and scalability much needed in the era of multi-cores. NoC-based systems also provide the capability of multiple clocking that is widely used in many SoC nowadays. In this paper, an optimal integer linear programming (ILP) solution for test scheduling of cores in a NoC-based SoC using multiple clock rates is presented. Results on different benchmarks show the effectiveness of our techniques en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.title An optimal formulation for test scheduling network-on-chip using multiple clock rates en_US
dc.type Conference Paper / Proceeding en_US
dc.author.school SAS en_US
dc.author.idnumber 199490170 en_US
dc.author.department Computer Science and Mathematics en_US
dc.description.embargo N/A en_US
dc.keywords Clocks en_US
dc.keywords System-on-a-chip en_US
dc.keywords Equations en_US
dc.keywords Scheduling en_US
dc.keywords Mathematical model en_US
dc.keywords Benchmark testing en_US
dc.identifier.doi http://dx.doi.org/10.1109/CCECE.2011.6030441 en_US
dc.identifier.ctation Salamy, H., & Harmanani, H. M. (2011, May). An optimal formulation for test scheduling network-on-chip using multiple clock rates. In Electrical and Computer Engineering (CCECE), 2011 24th Canadian Conference on (pp. 000215-000218). IEEE. en_US
dc.author.email haidar.harmanani@lau.edu.lb en_US
dc.conference.date 8-11 May 2011 en_US
dc.conference.pages 000215-000218 en_US
dc.conference.place Niagara Falls, ON, Canada en_US
dc.conference.title 2011 24th Canadian Conference on Electrical and Computer Engineering en_US
dc.identifier.tou http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php en_US
dc.identifier.url http://ieeexplore.ieee.org/abstract/document/6030441/ en_US
dc.author.affiliation Lebanese American University en_US

Files in this item

This item appears in the following Collection(s)

Show simple item record

Search LAUR

Advanced Search


My Account