Efficient shaped quantizer dithering implementation for sigma delta modulators

Abstract

A well-known limitation of sigma delta modulators is the generation of limit cycle oscillations for DC and slow varying inputs. These limit cycles give rise to undesired tones at the output of the modulator which result in the deterioration of the signal to noise ratio (SNR). However, the use of high dither signal amplitude results in raising the in-band noise floor level. Based on the analysis presented in this paper, it is shown that the required dithering amplitude can be minimal depending on the oversampling ratio (OSR). Moreover, a new dither injection technique for sigma delta modulators is presented based on the analysis findings. The proposed circuit effectively eliminates the undesired tonal components of the modulator though the randomization of the comparator's threshold levels. Simulation results using a first order single bit ΣΔ modulator show the suppression of the tonal components while deteriorating the SQNR by less than 1 dB.