An incremental approach for test scheduling and synthesis using genetic algorithms

Harmanani, H.; Hajar, A.

dc.contributor.author	Harmanani, H.
dc.contributor.author	Hajar, A.
dc.date.accessioned	2017-03-28T09:43:13Z
dc.date.available	2017-03-28T09:43:13Z
dc.date.issued	2017-03-28
dc.identifier.isbn	0-7803-8322-2	en_US
dc.identifier.uri	http://hdl.handle.net/10725/5442
dc.description.abstract	This paper presents a new and an efficient method for concurrent BIST synthesis and test scheduling. This method maximizes concurrent testing of modules while performing the allocation of functional units, test registers, and multiplexers. The method is based on a genetic algorithm that efficiently explores the testable design space. The method was implemented using C++ on a Linux workstation. Several benchmark examples have been implemented and favorable results are reported.	en_US
dc.language.iso	en	en_US
dc.publisher	IEEE	en_US
dc.title	An incremental approach for test scheduling and synthesis using genetic algorithms	en_US
dc.type	Conference Paper / Proceeding	en_US
dc.author.school	SAS	en_US
dc.author.idnumber	199490170	en_US
dc.author.department	Computer Science and Mathematics	en_US
dc.description.embargo	N/A	en_US
dc.keywords	Genetic algorithms	en_US
dc.keywords	Circuit testing	en_US
dc.keywords	Automatic testing	en_US
dc.keywords	Built-in self-test	en_US
dc.keywords	Biological cells	en_US
dc.keywords	High level synthesis	en_US
dc.keywords	Processor scheduling	en_US
dc.keywords	Performance evaluation	en_US
dc.keywords	Registers	en_US
dc.keywords	Digital circuits	en_US
dc.identifier.doi	http://dx.doi.org/10.1109/NEWCAS.2004.1359019	en_US
dc.identifier.ctation	Harmanani, H., & Hajar, A. (2004, June). An incremental approach for test scheduling and synthesis using genetic algorithms. In Circuits and Systems, 2004. NEWCAS 2004. The 2nd Annual IEEE Northeast Workshop on (pp. 69-72). IEEE.	en_US
dc.author.email	haidar.harmanani@lau.edu.lb	en_US
dc.conference.date	23-23 June 2004	en_US
dc.conference.pages	69-72	en_US
dc.conference.place	Montreal, Canada	en_US
dc.conference.title	The 2nd Annual IEEE Northeast Workshop on Circuits and Systems	en_US
dc.identifier.tou	http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php	en_US
dc.identifier.url	http://ieeexplore.ieee.org/abstract/document/1359019/	en_US
dc.author.affiliation	Lebanese American University	en_US