An incremental approach for test scheduling and synthesis using genetic algorithms

Harmanani, H.; Hajar, A.

An incremental approach for test scheduling and synthesis using genetic algorithms

Harmanani, H.; Hajar, A.

URI: http://hdl.handle.net/10725/5442

URL: http://ieeexplore.ieee.org/abstract/document/1359019/

DOI: http://dx.doi.org/10.1109/NEWCAS.2004.1359019

Date: 2017-03-28

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Abstract:

This paper presents a new and an efficient method for concurrent BIST synthesis and test scheduling. This method maximizes concurrent testing of modules while performing the allocation of functional units, test registers, and multiplexers. The method is based on a genetic algorithm that efficiently explores the testable design space. The method was implemented using C++ on a Linux workstation. Several benchmark examples have been implemented and favorable results are reported.

Citation:

Harmanani, H., & Hajar, A. (2004, June). An incremental approach for test scheduling and synthesis using genetic algorithms. In Circuits and Systems, 2004. NEWCAS 2004. The 2nd Annual IEEE Northeast Workshop on (pp. 69-72). IEEE.