Simulation of dynamic input buffer space in multistage interconnection networks

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dc.contributor.author Mansour, N.
dc.contributor.author Diab, H.
dc.contributor.author Tabbara, H.
dc.date.accessioned 2016-11-25T13:26:36Z
dc.date.available 2016-11-25T13:26:36Z
dc.date.copyright 2000 en_US
dc.identifier.issn 0965-9978 en_US
dc.identifier.uri http://hdl.handle.net/10725/4858
dc.description.abstract This paper presents a simulation study of a new dynamic allocation of input buffer space in multistage interconnection networks (MINs). MINs are composed of an interconnected set of switching elements (SEs), connected in a specific topology. The SEs are composed of input and output buffers which are used to store received and forwarded packets, respectively. The performance of these networks depends on the design of these internal buffers and the clock mechanism in synchronous MINs. Various cycle models exist which include the big cycle, small cycle and the smart cycle, each of which provides a more efficient cycle timing. The smart cycle model achieves a superior performance by using output buffers and acknowledgement. However, it suffers from lost and out-of-order packets at high traffic loads. This paper, presents a variation of the smart cycle model, whereby, the input buffer space of each SE is allocated dynamically as a function of traffic load, in order to overcome the above-mentioned drawbacks. A shared buffer pool is provided, which supplies the required input buffer space as required by each SE. Simulation results are presented, which show the required buffer pool for various network sizes and for different network loads. Also, comparison with a static allocation scheme shows an increased network throughput, and the elimination of lost and out-of-order packets at high traffic loads. en_US
dc.language.iso en en_US
dc.title Simulation of dynamic input buffer space in multistage interconnection networks en_US
dc.type Article en_US
dc.description.version Published en_US
dc.author.school SAS en_US
dc.author.idnumber 198629170 en_US
dc.author.department Computer Science and Mathematics en_US
dc.description.embargo N/A en_US
dc.relation.journal Advances in Engineering Software en_US
dc.journal.volume 31 en_US
dc.journal.issue 1 en_US
dc.article.pages 13-24 en_US
dc.keywords Dynamic buffer en_US
dc.keywords Multistage networks en_US
dc.keywords Performance evaluation en_US
dc.keywords Simulation en_US
dc.identifier.doi http://dx.doi.org/10.1016/S0965-9978(99)00025-3 en_US
dc.identifier.ctation Diab, H., Tabbara, H., & Mansour, N. (2000). Simulation of dynamic input buffer space in multistage interconnection networks. Advances in Engineering Software, 31(1), 13-24. en_US
dc.author.email nmansour@lau.edu.lb en_US
dc.identifier.tou http://libraries.lau.edu.lb/research/laur/terms-of-use/articles.php en_US
dc.identifier.url http://www.sciencedirect.com/science/article/pii/S0965997899000253 en_US
dc.author.affiliation Lebanese American University en_US

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