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An Evolutionary Algorithm for the Allocation Problem in High-Level Synthesis

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dc.contributor.author Harmanani, Haidar
dc.contributor.author Saliba, Rony
dc.date.accessioned 2016-04-12T06:36:57Z
dc.date.available 2016-04-12T06:36:57Z
dc.date.copyright 2005
dc.date.issued 2016-04-12
dc.identifier.issn 0218-1266 en_US
dc.identifier.uri http://hdl.handle.net/10725/3532
dc.description.abstract This paper presents an evolutionary algorithm to solve the datapath allocation problem in high-level synthesis. The method performs allocation of functional units, registers, and multiplexers in addition to controller synthesis with the objective of minimizing the cost of hardware resources. The system handles multicycle functional units as well as structural pipelining. The proposed method was implemented using C++ on a Linux workstation. We tested our method on a set of high-level synthesis benchmarks, all yielding good solutions in a short time. An integration path to Field Programmable Gate Arrays (FPGAs) is provided through VHDL. en_US
dc.language.iso en en_US
dc.title An Evolutionary Algorithm for the Allocation Problem in High-Level Synthesis en_US
dc.type Article en_US
dc.description.version Published en_US
dc.author.school SAS en_US
dc.author.idnumber 199490170 en_US
dc.author.woa N/A en_US
dc.author.department Computer Science and Mathematics en_US
dc.description.embargo N/A en_US
dc.relation.journal Journal of Circuits, Systems and Computers en_US
dc.journal.volume 14 en_US
dc.journal.issue 2 en_US
dc.keywords High-level synthesis en_US
dc.keywords Datapath allocation en_US
dc.keywords Genetic algorithms en_US
dc.identifier.doi http://dx.doi.org/10.1142/S0218126605002362 en_US
dc.identifier.ctation Harmanani, H. M., & Saliba, R. (2005). An Evolutionary Algorithm for the Allocation Problem in High-Level Synthesis. Journal of Circuits, Systems, and Computers, 14(02), 347-366. en_US
dc.author.email haidar.harmanani@lau.edu.lb
dc.identifier.url http://www.worldscientific.com/doi/abs/10.1142/S0218126605002362


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