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Showing 10 out of a total of 32 results for community: School of Arts and Sciences.
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A Simulated Annealing Algorithm for System-on-Chip Test Scheduling with, Power and Precedence Constraints
Harmanani, Haidar M.
;
Salamy, Hassan A.
(
2017-10-12
)
An outcome-based assessment process for accrediting computing programmes
Harmanani, Haidar M.
(
2017-02-08
)
Thermal-aware test scheduling using network-on-chip under multiple clock rates
Harmanani, Haidar M.
;
Salamy, Hassan
(
2017-07-27
)
A simulated annealing algorithm for the capacitated vehicle routing problem
Azar, Danielle
;
Harmanani, Haidar M.
;
Helal, Nathalies Georges
;
Keirouz, Walid
(
2017-03-15
)
A neural networks algorithm for data path synthesis
Harmanani, Haidar M.
(
2017-10-12
)
An all-digital fast tracking switching converter with a programmable order loop controller for envelope tracking RF power amplifiers
Harmanani, Haidar M.
;
Ferzli, Rony
;
Anabtawi, Nijad
(
IEEE
,
2017-03-28
)
A multiobjective optimization method for the SOC Test Time, TAM, and power optimization using a strength pareto evolutionary algorithm
Harmanani, Haidar M.
;
Farah, Rana
;
Marrouche, Wissam
(
Springer
,
2018-04-27
)
Efficient shaped quantizer dithering implementation for sigma delta modulators
Harmanani, Haidar M.
;
Ferzli, Rony
;
Anabtawi, Nijad
(
IEEE
,
2017-03-28
)
A method for optimizing test bus assignment and sizing for system-on-a-chip
Harmanani, Haidar M.
;
Sawan, Rachel
(
IEEE
,
2017-03-29
)
An optimal formulation for test scheduling network-on-chip using multiple clock rates
Harmanani, Haidar M.
;
Salamy, Hassan
(
IEEE
,
2017-03-28
)
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Author
Harmanani, Haidar M. (32)
Farah, Rana (4)
Anabtawi, Nijad (3)
Ferzli, Rony (3)
Salamy, Hassan A. (3)
Sawan, Rachel (3)
Azar, Danielle (2)
Bou Ghosn, Steve (2)
Dibeh, Ghassan (2)
Keirouz, Walid (2)
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Subject
Application software -- Congresses (1)
Computers -- Congresses (1)
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Date Issued
2018 (6)
2017 (23)
2016 (3)