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Test bus assignment, sizing, and partitioning for system-on-chip

Harmanani, Haidar M.; Sawan, Rachel (2017-08-10)
Test time minimization for system-on-chip with test bus assignment and sizin

Harmanani, Haidar M.; Sawan, Rachel (IEEE, 2017-03-29)
A method for optimizing test bus assignment and sizing for system-on-a-chip

Harmanani, Haidar M.; Sawan, Rachel (IEEE, 2017-03-29)

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Author
- Harmanani, Haidar M. (3)
- Sawan, Rachel (3)
Date Issued
- 2017 (3)