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Browsing by Subject "Integrated circuits -- Very large scale integration"

LAUR Repository

Browsing by Subject "Integrated circuits -- Very large scale integration"

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  • A Graph Heuristic Approach for the Data Path Allocation Problem 
    Makhoul, Racha (Lebanese American University, 2022-12-21)
    The current escalation in usage and complexity of modern digital systems, and the emergence of Very-Large Scale Integration (VLSI) has led to a huge design productivity gap in the chip design industry. It is well established ...
  • KT2C. (c2014) 
    Al Kawam, Ahmad (2016-03-03)
    We introduce the K-way Thermal Chip Clustering (KT2C) algorithm; a VLSI chip partitioning algorithm that is used to reduce the chip’s temperature and prevent the formation of hotspots. The clustering algorithm is integrated ...
  • Layout Driven Binding In High Level Synthesis Using Reinforcement Learning 
    Melhem, Marie-Claire (Lebanese American University, 2021-07-19)
    The increase in density that the advent of Very Large Scale Integration (VLSI) has made the move to higher levels of design abstraction imperative. High Level Synthesis (HLS) emerged as a viable approach that has been ...
  • Parallel multi-voltage power minimization in VLSI circuits. (c2013) 
    Younes, Rabih Halim (2015-02-10)
    Power consumption minimization is nowadays considered a main challenge to VLSI designers, especially with the growth of the mobile computing industry. Previous studies have tried minimizing power consumption at the expense ...
  • Power and temperature aware functional unit binding in high level synthesis. (c2011) 
    Bassil, Layale (2011-11-29)
    This project elaborates on the possibility of optimizing the power consumed by the functional units by optimizing the functional unit binding technique. Functional unit binding maps the operations in each control step ...